Main Page | Modules | Data Structures | Directories | File List | Data Fields | Globals | Related Pages

# a2d.c

    00001
    00002 // system includes
    00003 #include "global.h"
    00004 #include "AT91SAM7S64.h"
    00005
    00006 // local includes
    00007 #include "rprintf.h"
    00008 #include "a2d.h"
    00009
    00010 void a2dInit(void)
    00011 {
    00012     // turn on clock to ADC (note: unnecessary)
    00013     // AT91C_BASE_PMC->PMC_PCER = (1<<AT91C_ID_ADC);
    00014
    00015     // activate PA17-20 as inputs
    00016     AT91C_BASE_PIOA->PIO_PER =   AT91C_PIO_PA17|AT91C_PIO_PA18|AT91C_PIO_PA19|AT91C_PIO_PA20;
    00017     AT91C_BASE_PIOA->PIO_ODR =   AT91C_PIO_PA17|AT91C_PIO_PA18|AT91C_PIO_PA19|AT91C_PIO_PA20;
    00018     AT91C_BASE_PIOA->PIO_PPUDR = AT91C_PIO_PA17|AT91C_PIO_PA18|AT91C_PIO_PA19|AT91C_PIO_PA20;
    00019
    00020     // set ADC mode
    00021     AT91C_BASE_ADC->ADC_MR =    AT91C_ADC_TRGEN_DIS |
    00022                                 AT91C_ADC_LOWRES_10_BIT |
    00023                                 AT91C_ADC_SLEEP_NORMAL_MODE |
    00024                                 (0x3F<<8) |     // prescale setting
    00025                                 (0x08<<16) |    // startup setting
    00026                                 (0x0F<<24);     // sample-and-hold time
    00027
    00028     // enable all channels
    00029 /*  AT91C_BASE_ADC->ADC_CHER =  AT91C_ADC_CH0 |
    00030                                 AT91C_ADC_CH1 |
    00031                                 AT91C_ADC_CH2 |
    00032                                 AT91C_ADC_CH3 |
    00033                                 AT91C_ADC_CH4 |
    00034                                 AT91C_ADC_CH5 |
    00035                                 AT91C_ADC_CH6 |
    00036                                 AT91C_ADC_CH7;
    00037 */
    00038 }
    00039
    00040 int a2dConvert(int channel)
    00041 {
    00042     // enable the requested channel (and only the requested channel)
    00043     AT91C_BASE_ADC->ADC_CHDR = 0xFF;
    00044     AT91C_BASE_ADC->ADC_CHER = 1<<channel;
    00045
    00046     // start conversion
    00047     AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START;
    00048
    00049     // wait for end-of-conversion
    00050     // actually, we wait for data ready
    00051     while(!(AT91C_BASE_ADC->ADC_SR & AT91C_ADC_DRDY));
    00052
    00053     // return data
    00054     return AT91C_BASE_ADC->ADC_LCDR;
    00055 }