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# uartdma.h

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    00001 /*! \file uartdma.h \brief UART driver for AT91SAM7S with DMA. */
    00002 //*****************************************************************************
    00003 //
    00004 // File Name    : 'uartintr.h'
    00005 // Title        : UART driver for AT91SAM7S with DMA
    00006 // Author       : Pascal Stang - Copyright (C) 2004-2006
    00007 // Created      : 4/3/2004
    00008 // Revised      : 10/24/2006
    00009 // Version      : 0.1
    00010 // Target MCU   : Atmel ARM AT91SAM7S Series
    00011 // Editor Tabs  : 4
    00012 //
    00013 /// \ingroup driver_arm_at91
    00014 /// \defgroup uartdma_at91 UART driver for AT91SAM7S with DMA (armlib/arch/at91/uartdma.c)
    00015 /// \code #include "uartdma.h" \endcode
    00016 /// \par Overview
    00017 ///     To be written...
    00018 //
    00019 // This code is distributed under the GNU Public License
    00020 //      which can be found at http://www.gnu.org/licenses/gpl.txt
    00021 //
    00022 //*****************************************************************************
    00023 //@{
    00024
    00025 #ifndef ARMLIB_UARTDMA_H
    00026 #define ARMLIB_UARTDMA_H
    00027
    00028 #include "global.h"
    00029 #include "buffer.h"
    00030
    00031 // defines
    00032 #ifndef UART0_INTERRUPT_LEVEL
    00033 #define UART0_INTERRUPT_LEVEL   6
    00034 #endif
    00035 #ifndef UART1_INTERRUPT_LEVEL
    00036 #define UART1_INTERRUPT_LEVEL   6
    00037 #endif
    00038 // NOTE: interrupt level of UART2 (DBGU) is not selectable
    00039
    00040
    00041 // UART_BAUD calculates a division rate given a baud rate
    00042 // for use with uart0Init() and uart1Init()
    00043 // example: uart0Init(UART_BAUD(115200), UART_8N1);
    00044 //
    00045 // BEWARE: additional code will be generated if 'baud' is not a constant
    00046 #define UART_BAUD(baud) (uint16_t)((F_CPU+baud*8L)/(baud*16))
    00047
    00048 // Definitions for UART mode settings (databits, parity, stopbits)
    00049 #define UART_8N1      (AT91C_US_CHRL_8_BITS | AT91C_US_PAR_NONE | AT91C_US_NBSTOP_1_BIT)
    00050 #define UART_8N2      (AT91C_US_CHRL_8_BITS | AT91C_US_PAR_NONE | AT91C_US_NBSTOP_2_BIT)
    00051 #define UART_7N1      (AT91C_US_CHRL_7_BITS | AT91C_US_PAR_NONE | AT91C_US_NBSTOP_1_BIT)
    00052 #define UART_7N2      (AT91C_US_CHRL_7_BITS | AT91C_US_PAR_NONE | AT91C_US_NBSTOP_2_BIT)
    00053
    00054 #define UART_8E1      (AT91C_US_CHRL_8_BITS | AT91C_US_PAR_EVEN | AT91C_US_NBSTOP_1_BIT)
    00055 #define UART_8E2      (AT91C_US_CHRL_8_BITS | AT91C_US_PAR_EVEN | AT91C_US_NBSTOP_2_BIT)
    00056 #define UART_7E1      (AT91C_US_CHRL_7_BITS | AT91C_US_PAR_EVEN | AT91C_US_NBSTOP_1_BIT)
    00057 #define UART_7E2      (AT91C_US_CHRL_7_BITS | AT91C_US_PAR_EVEN | AT91C_US_NBSTOP_2_BIT)
    00058
    00059 #define UART_8O1      (AT91C_US_CHRL_8_BITS | AT91C_US_PAR_ODD  | AT91C_US_NBSTOP_1_BIT)
    00060 #define UART_8O2      (AT91C_US_CHRL_8_BITS | AT91C_US_PAR_ODD  | AT91C_US_NBSTOP_2_BIT)
    00061 #define UART_7O1      (AT91C_US_CHRL_7_BITS | AT91C_US_PAR_ODD  | AT91C_US_NBSTOP_1_BIT)
    00062 #define UART_7O2      (AT91C_US_CHRL_7_BITS | AT91C_US_PAR_ODD  | AT91C_US_NBSTOP_2_BIT)
    00063
    00064
    00065 // buffer memory allocation defines
    00066 // buffer sizes
    00067 #ifndef UART0_TX_BUFFER_SIZE
    00068 #define UART0_TX_BUFFER_SIZE        0x0010  ///< number of bytes for uart0 transmit buffer
    00069 #endif
    00070 #ifndef UART0_RX_BUFFER_SIZE
    00071 #define UART0_RX_BUFFER_SIZE        0x0080  ///< number of bytes for uart0 receive buffer
    00072 #endif
    00073 #ifndef UART1_TX_BUFFER_SIZE
    00074 #define UART1_TX_BUFFER_SIZE        0x0010  ///< number of bytes for uart1 transmit buffer
    00075 #endif
    00076 #ifndef UART1_RX_BUFFER_SIZE
    00077 #define UART1_RX_BUFFER_SIZE        0x0080  ///< number of bytes for uart1 receive buffer
    00078 #endif
    00079 #ifndef UART2_TX_BUFFER_SIZE
    00080 #define UART2_TX_BUFFER_SIZE        0x0010  ///< number of bytes for uart2 transmit buffer
    00081 #endif
    00082 #ifndef UART2_RX_BUFFER_SIZE
    00083 #define UART2_RX_BUFFER_SIZE        0x0080  ///< number of bytes for uart2 receive buffer
    00084 #endif
    00085
    00086 // functions
    00087
    00088 //! initializes uart
    00089 void uart0Init(uint16_t bauddiv, uint32_t mode);
    00090 void uart1Init(uint16_t bauddiv, uint32_t mode);
    00091 void uart2Init(uint16_t bauddiv, uint32_t mode);
    00092
    00093 //! initializes transmit and receive buffers
    00094 // called from uartInit()
    00095 void uart0InitBuffers(void);
    00096 void uart1InitBuffers(void);
    00097 void uart2InitBuffers(void);
    00098
    00099 //! setup DMA for circular-buffer transmit
    00100 // called from uartInit();
    00101 void uartInitDmaTx(int dev);
    00102
    00103 //! setup DMA for circular-buffer receive
    00104 // called from uartInit();
    00105 void uartInitDmaRx(int dev);
    00106
    00107 // returns the serial port buffer for doing buffer-based processing
    00108 // THIS WILL LIKELY BE ELIMINATED WHEN RX IS HANDLED BY DMA
    00109 cBuffer* uartGetRxBuffer(int dev);
    00110
    00111 //! sends a single byte over the uart
    00112 // These functions automatically circular-buffer the data,
    00113 // resulting in a small amount of CPU usage at the time of function call.
    00114 // No CPU time is used during actual transmit.
    00115 int uartSendByte(int dev, int data);
    00116 inline int uart0SendByte(int data) { return uartSendByte(0, data); };
    00117 inline int uart1SendByte(int data) { return uartSendByte(1, data); };
    00118 inline int uart2SendByte(int data) { return uartSendByte(2, data); };
    00119
    00120 //! gets a single byte from the uart receive buffer
    00121 int uartGetByte(int dev);
    00122 inline int uart0GetByte(void) { return uartGetByte(0); };
    00123 inline int uart1GetByte(void) { return uartGetByte(1); };
    00124 inline int uart2GetByte(void) { return uartGetByte(2); };
    00125
    00126 //! sends a block of data over the uart
    00127 // To maintain data integrity, the user must not modify the data buffer until the transfer is complete.
    00128 int uartSendBlock(int dev, unsigned char* data, unsigned int len);
    00129 inline int uart0SendBlock(unsigned char* data, unsigned int len) { return uartSendBlock(0,data,len); };
    00130 inline int uart1SendBlock(unsigned char* data, unsigned int len) { return uartSendBlock(1,data,len); };
    00131 inline int uart2SendBlock(unsigned char* data, unsigned int len) { return uartSendBlock(2,data,len); };
    00132
    00133 //! gets a block of data from over the uart
    00134 // if len>0, a new transfer is set up, and returns <len>
    00135 // if len=0, returns the number of bytes left to transfer (can be used to poll for completion)
    00136 int uartGetBlock(int dev, unsigned char* data, unsigned int len);
    00137 inline int uart0GetBlock(unsigned char* data, unsigned int len) { return uartGetBlock(0,data,len); };
    00138 inline int uart1GetBlock(unsigned char* data, unsigned int len) { return uartGetBlock(1,data,len); };
    00139 inline int uart2GetBlock(unsigned char* data, unsigned int len) { return uartGetBlock(2,data,len); };
    00140
    00141 //! interrupt service handlers
    00142 void uart0Service(void);
    00143 void uart1Service(void);
    00144 void uart2Service(void);
    00145
    00146 #endif
    00147 //@}