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# uartintr.h

    00001 /*! \file uartintr.h \brief UART driver for AT91SAM7S with interrupts. */
    00002 //*****************************************************************************
    00003 //
    00004 // File Name    : 'uartintr.h'
    00005 // Title        : UART driver for AT91SAM7S with interrupts
    00006 // Author       : Pascal Stang - Copyright (C) 2004-2006
    00007 // Created      : 4/3/2004
    00008 // Revised      : 7/4/2006
    00009 // Version      : 0.1
    00010 // Target MCU   : Atmel ARM AT91SAM7S Series
    00011 // Editor Tabs  : 4
    00012 //
    00013 /// \ingroup driver_arm_at91
    00014 /// \defgroup uartintr_at91 UART driver for AT91SAM7S with interrupts (armlib/arch/at91/uartintr.c)
    00015 /// \code #include "uartintr.h" \endcode
    00016 /// \par Overview
    00017 ///     To be written...
    00018 //
    00019 // This code is distributed under the GNU Public License
    00020 //      which can be found at http://www.gnu.org/licenses/gpl.txt
    00021 //
    00022 //*****************************************************************************
    00023 //@{
    00024
    00025 #ifndef ARMLIB_UARTINTR_H
    00026 #define ARMLIB_UARTINTR_H
    00027
    00028 #include "global.h"
    00029 #include "buffer.h"
    00030
    00031 // defines
    00032 #ifndef UART0_INTERRUPT_LEVEL
    00033 #define UART0_INTERRUPT_LEVEL   6
    00034 #endif
    00035 #ifndef UART1_INTERRUPT_LEVEL
    00036 #define UART1_INTERRUPT_LEVEL   6
    00037 #endif
    00038
    00039 // UART_BAUD calculates a division rate given a baud rate
    00040 // for use with uart0Init() and uart1Init()
    00041 // example: uart0Init(UART_BAUD(115200), UART_8N1);
    00042 //
    00043 // BEWARE: additional code will be generated if 'baud' is not a constant
    00044 #define UART_BAUD(baud) (uint16_t)((F_CPU+baud*8L)/(baud*16))
    00045
    00046 // Definitions for UART mode settings (databits, parity, stopbits)
    00047 #define UART_8N1      (AT91C_US_CHRL_8_BITS | AT91C_US_PAR_NONE | AT91C_US_NBSTOP_1_BIT)
    00048 #define UART_8N2      (AT91C_US_CHRL_8_BITS | AT91C_US_PAR_NONE | AT91C_US_NBSTOP_2_BIT)
    00049 #define UART_7N1      (AT91C_US_CHRL_7_BITS | AT91C_US_PAR_NONE | AT91C_US_NBSTOP_1_BIT)
    00050 #define UART_7N2      (AT91C_US_CHRL_7_BITS | AT91C_US_PAR_NONE | AT91C_US_NBSTOP_2_BIT)
    00051
    00052 #define UART_8E1      (AT91C_US_CHRL_8_BITS | AT91C_US_PAR_EVEN | AT91C_US_NBSTOP_1_BIT)
    00053 #define UART_8E2      (AT91C_US_CHRL_8_BITS | AT91C_US_PAR_EVEN | AT91C_US_NBSTOP_2_BIT)
    00054 #define UART_7E1      (AT91C_US_CHRL_7_BITS | AT91C_US_PAR_EVEN | AT91C_US_NBSTOP_1_BIT)
    00055 #define UART_7E2      (AT91C_US_CHRL_7_BITS | AT91C_US_PAR_EVEN | AT91C_US_NBSTOP_2_BIT)
    00056
    00057 #define UART_8O1      (AT91C_US_CHRL_8_BITS | AT91C_US_PAR_ODD  | AT91C_US_NBSTOP_1_BIT)
    00058 #define UART_8O2      (AT91C_US_CHRL_8_BITS | AT91C_US_PAR_ODD  | AT91C_US_NBSTOP_2_BIT)
    00059 #define UART_7O1      (AT91C_US_CHRL_7_BITS | AT91C_US_PAR_ODD  | AT91C_US_NBSTOP_1_BIT)
    00060 #define UART_7O2      (AT91C_US_CHRL_7_BITS | AT91C_US_PAR_ODD  | AT91C_US_NBSTOP_2_BIT)
    00061
    00062
    00063 // buffer memory allocation defines
    00064 // buffer sizes
    00065 #ifndef UART0_TX_BUFFER_SIZE
    00066 #define UART0_TX_BUFFER_SIZE        0x0010  ///< number of bytes for uart0 transmit buffer
    00067 #endif
    00068 #ifndef UART0_RX_BUFFER_SIZE
    00069 #define UART0_RX_BUFFER_SIZE        0x0080  ///< number of bytes for uart0 receive buffer
    00070 #endif
    00071 #ifndef UART1_TX_BUFFER_SIZE
    00072 #define UART1_TX_BUFFER_SIZE        0x0010  ///< number of bytes for uart1 transmit buffer
    00073 #endif
    00074 #ifndef UART1_RX_BUFFER_SIZE
    00075 #define UART1_RX_BUFFER_SIZE        0x0080  ///< number of bytes for uart1 receive buffer
    00076 #endif
    00077 #ifndef UART2_TX_BUFFER_SIZE
    00078 #define UART2_TX_BUFFER_SIZE        0x0010  ///< number of bytes for uart2 transmit buffer
    00079 #endif
    00080 #ifndef UART2_RX_BUFFER_SIZE
    00081 #define UART2_RX_BUFFER_SIZE        0x0080  ///< number of bytes for uart2 receive buffer
    00082 #endif
    00083
    00084 // functions
    00085
    00086 //! initializes uart
    00087 void uart0Init(uint16_t bauddiv, uint32_t mode);
    00088 void uart1Init(uint16_t bauddiv, uint32_t mode);
    00089 void uart2Init(uint16_t bauddiv, uint32_t mode);
    00090
    00091 //! get receive buffer structure
    00092 cBuffer* uartGetRxBuffer(int dev);
    00093
    00094 //! sends a single byte over the uart
    00095 int uart0SendByte(int data);
    00096 int uart1SendByte(int data);
    00097 int uart2SendByte(int data);
    00098
    00099 //! gets a single byte from the uart receive buffer
    00100 int uart0GetByte(void);
    00101 int uart1GetByte(void);
    00102 int uart2GetByte(void);
    00103
    00104 //! interrupt service handlers
    00105 void uart0Service(void);
    00106 void uart1Service(void);
    00107 void uart2Service(void);
    00108
    00109
    00110 #endif
    00111 //@}