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# membus_opt.c

    00001 /*! \file membus.c \brief Software-driven Memory Bus for ARMmini-LPC210x. */
    00002 //*****************************************************************************
    00003 //
    00004 // File Name    : 'membus.c'
    00005 // Title        : Software-driven Memory Bus for ARMmini-LPC210x
    00006 // Author       : Pascal Stang - Copyright (C) 2004
    00007 // Created      : 2004.05.05
    00008 // Revised      : 2004.07.12
    00009 // Version      : 0.1
    00010 // Target MCU   : ARM processors
    00011 // Editor Tabs  : 4
    00012 //
    00013 // NOTE: This code is currently below version 1.0, and therefore is considered
    00014 // to be lacking in some functionality or documentation, or may not be fully
    00015 // tested.  Nonetheless, you can expect most functions to work.
    00016 //
    00017 // This code is distributed under the GNU Public License
    00018 //      which can be found at http://www.gnu.org/licenses/gpl.txt
    00019 //
    00020 //*****************************************************************************
    00021
    00022 #include "lpc2000.h"
    00023 #include "global.h"
    00024 #include "processor.h"
    00025 #include "timer.h"
    00026 #include "membus.h"
    00027
    00028 u16 MembusAddr = 0;
    00029
    00030 void membusInit(void)
    00031 {
    00032     // setup I/O lines
    00033     IOCLR = MEMBUS_LATCH;
    00034     IOSET = MEMBUS_nRD;
    00035     IOSET = MEMBUS_nWR;
    00036     // set inputs
    00037     IODIR &= ~P015;
    00038     // set outputs
    00039     IODIR |= (MEMBUS_IO | MEMBUS_LATCH | MEMBUS_nRD | MEMBUS_nWR);
    00040 }
    00041
    00042 uint16_t membusRead(uint16_t addr)
    00043 {
    00044     uint16_t data;
    00045     int flags;
    00046
    00047     // disable interrupts
    00048     flags = disableIRQ();
    00049     if(MembusAddr != addr)
    00050     {
    00051         // switch bus to output
    00052         IODIR |= MEMBUS_IO;
    00053         // assert address and latch address
    00054         IOCLR = MEMBUS_IO;
    00055         IOSET = addr<<16 | MEMBUS_LATCH;
    00056         // delay
    00057         MEMBUS_DELAY;
    00058         IOCLR = MEMBUS_LATCH | MEMBUS_IO;
    00059         MembusAddr = addr;
    00060     }
    00061
    00062     // switch bus to input
    00063     IODIR &= ~MEMBUS_IO;
    00064     // assert read
    00065     IOCLR = MEMBUS_nRD;
    00066     // delay
    00067     MEMBUS_DELAY;
    00068     // read in data
    00069     data = IOPIN>>16;
    00070     // release read
    00071     IOSET = MEMBUS_nRD;
    00072     // restore interrupts
    00073     restoreIRQ(flags);
    00074
    00075     return data;
    00076 }
    00077
    00078 void membusWrite(uint16_t addr, uint16_t data)
    00079 {
    00080     int flags;
    00081
    00082     // disable interrupts
    00083     flags = disableIRQ();
    00084     // switch bus to output
    00085     IODIR |= MEMBUS_IO;
    00086     if(MembusAddr != addr)
    00087     {
    00088         // assert address and latch address
    00089         IOCLR = MEMBUS_IO;
    00090         IOSET = addr<<16 | MEMBUS_LATCH;
    00091         // delay
    00092         MEMBUS_DELAY;
    00093         IOCLR = MEMBUS_LATCH | MEMBUS_IO;
    00094         MembusAddr = addr;
    00095     }
    00096
    00097     // output data
    00098 //  IOCLR = MEMBUS_IO;
    00099     IOSET = ((uint32_t)data)<<16;
    00100     // assert write
    00101     IOCLR = MEMBUS_nWR;
    00102     // delay
    00103     MEMBUS_DELAY;
    00104     // release write
    00105     IOSET = MEMBUS_nWR;
    00106     // restore interrupts
    00107     restoreIRQ(flags);
    00108 }