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# AT91SAM7S Processor Initialization and Support (armlib/arch/at91/processor.c)
[Drivers for Atmel AT91 ARM Processors]

## Detailed Description

     #include "processor.h"

Overview
  To be written...

## Defines
#define | CPSR_MASK_IRQ 0x00000080
#define | CPSR_MASK_FIQ 0x00000040
#define | CPSR_MASK_INT (CPSR_MASK_IRQ | CPSR_MASK_FIQ)
#define | CRITICAL_SECTION_BEGIN unsigned int _cpsr = processorDisableInt(CPSR_MASK_INT)
#define | CRITICAL_SECTION_END processorRestoreInt(_cpsr)
#define | SYSPID_PITC 0
#define | SYSPID_DBGU 1
#define | SYSPID_RTTC 2
#define | SYSPID_EFC 3
#define | SYSPID_PMC 4
#define | SYSPID_NUM 5
#define | ISR_ENTRY()
#define | ISR_EXIT()
## Functions
void | processorInit (void)
unsigned int | processorEnableInt (unsigned int cpsr_mask)
unsigned int | processorDisableInt (unsigned int cpsr_mask)
unsigned int | processorRestoreInt (unsigned int cpsr_orig)
void | processorAicInit (void)
void | processorAicAttach (int pid, int srcmode, void(*userFunc)(void))
void | processorAicDetach (int pid)
void | processorAicAttachSys (int syspid, void(*userFunc)(void))
void | processorSysIntService (void)

## Define Documentation

#define ISR_ENTRY | (
|  | ) |

| Value:
    asm volatile(" sub   lr, lr,#4\n" \
                                     " stmfd sp!,{r0-r12,lr}\n" \
                                     " mrs   r1, spsr\n" \
                                     " stmfd sp!,{r1}")
Definition at line 76 of file processor.h.

#define ISR_EXIT | (
|  | ) |

| Value:
    asm volatile(" ldmfd sp!,{r1}\n" \
                                     " msr   spsr_c,r1\n" \
                                     " ldmfd sp!,{r0-r12,pc}^")
Definition at line 83 of file processor.h.