Here are several miscellaneous parameters.
PREDICATE_CODES
machine.c
. This macro is called within an initializer of an
array of structures. The first field in the structure is the name of a
predicate and the second field is an array of rtl codes. For each
predicate, list all rtl codes that can be in expressions matched by the
predicate. The list should have a trailing comma. Here is an example
of two entries in the list for a typical RISC machine:
#define PREDICATE_CODES \ {"gen_reg_rtx_operand", {SUBREG, REG}}, \ {"reg_or_short_cint_operand", {SUBREG, REG, CONST_INT}},
Defining this macro does not affect the generated code (however,
incorrect definitions that omit an rtl code that may be matched by the
predicate can cause the compiler to malfunction). Instead, it allows
the table built by genrecog
to be more compact and efficient,
thus speeding up the compiler. The most important predicates to include
in the list specified by this macro are those used in the most insn
patterns.
For each predicate function named in PREDICATE_CODES
, a
declaration will be generated in insn-codes.h
.
SPECIAL_MODE_PREDICATES
match_operand
without a mode; if the operand predicate is
listed in SPECIAL_MODE_PREDICATES
, the warning will be
suppressed.
Here is an example from the IA-32 port (ext_register_operand
specially checks for HImode
or SImode
in preparation
for a byte extraction from %ah
etc.).
#define SPECIAL_MODE_PREDICATES \ "ext_register_operand",
CASE_VECTOR_MODE
CASE_VECTOR_SHORTEN_MODE (
min_offset,
max_offset,
body)
addr_diff_vec
when the minimum and maximum offset are known. If you define this,
it enables extra code in branch shortening to deal with addr_diff_vec
.
To make this work, you also have to define INSN_ALIGN
and
make the alignment for addr_diff_vec
explicit.
The body argument is provided so that the offset_unsigned and scale
flags can be updated.
CASE_VECTOR_PC_RELATIVE
CASE_DROPS_THROUGH
case
insn when the index
value is out of range. This means the specified default-label is
actually ignored by the case
insn proper.
CASE_VALUES_THRESHOLD
casesi
instruction and
five otherwise. This is best for most machines.
WORD_REGISTER_OPERATIONS
LOAD_EXTEND_OP (
mode)
SIGN_EXTEND
for values
of mode for which the
insn sign-extends, ZERO_EXTEND
for which it zero-extends, and
NIL
for other modes.
This macro is not called with mode non-integral or with a width
greater than or equal to BITS_PER_WORD
, so you may return any
value in this case. Do not define this macro if it would always return
NIL
. On machines where this macro is defined, you will normally
define it as the constant SIGN_EXTEND
or ZERO_EXTEND
.
SHORT_IMMEDIATES_SIGN_EXTEND
FIXUNS_TRUNC_LIKE_FIX_TRUNC
MOVE_MAX
MAX_MOVE_MAX
MOVE_MAX
. Otherwise, it is the
constant value that is the largest value that MOVE_MAX
can have
at run-time.
SHIFT_COUNT_TRUNCATED
SHIFT_COUNT_TRUNCATED
also enables deletion of truncations of the values that serve as
arguments to bit-field instructions.
If both types of instructions truncate the count (for shifts) and position (for bit-field operations), or if no variable-position bit-field instructions exist, you should define this macro.
However, on some machines, such as the 80386 and the 680x0, truncation
only applies to shift operations and not the (real or pretended)
bit-field operations. Define SHIFT_COUNT_TRUNCATED
to be zero on
such machines. Instead, add patterns to the md
file that include
the implied truncation of the shift instructions.
You need not define this macro if it would always have the value of zero.
TRULY_NOOP_TRUNCATION (
outprec,
inprec)
On many machines, this expression can be 1.
When TRULY_NOOP_TRUNCATION
returns 1 for a pair of sizes for
modes for which MODES_TIEABLE_P
is 0, suboptimal code can result.
If this is the case, making TRULY_NOOP_TRUNCATION
return 0 in
such cases may improve things.
STORE_FLAG_VALUE
s
cond
) when the condition is true. This description must
apply to all the s
cond
patterns and all the
comparison operators whose results have a MODE_INT
mode.
A value of 1 or -1 means that the instruction implementing the
comparison operator returns exactly 1 or -1 when the comparison is true
and 0 when the comparison is false. Otherwise, the value indicates
which bits of the result are guaranteed to be 1 when the comparison is
true. This value is interpreted in the mode of the comparison
operation, which is given by the mode of the first operand in the
s
cond pattern. Either the low bit or the sign bit of
STORE_FLAG_VALUE
be on. Presently, only those bits are used by
the compiler.
If STORE_FLAG_VALUE
is neither 1 or -1, the compiler will
generate code that depends only on the specified bits. It can also
replace comparison operators with equivalent operations if they cause
the required bits to be set, even if the remaining bits are undefined.
For example, on a machine whose comparison operators return an
SImode
value and where STORE_FLAG_VALUE
is defined as
0x80000000
, saying that just the sign bit is relevant, the
expression
(ne:SI (and:SI x (const_int power-of-2)) (const_int 0))
can be converted to
(ashift:SI x (const_int n))
where n is the appropriate shift count to move the bit being tested into the sign bit.
There is no way to describe a machine that always sets the low-order bit for a true value, but does not guarantee the value of any other bits, but we do not know of any machine that has such an instruction. If you are trying to port GCC to such a machine, include an instruction to perform a logical-and of the result with 1 in the pattern for the comparison operators and let us know at gcc@gcc.gnu.org.
Often, a machine will have multiple instructions that obtain a value
from a comparison (or the condition codes). Here are rules to guide the
choice of value for STORE_FLAG_VALUE
, and hence the instructions
to be used:
STORE_FLAG_VALUE
. It is more efficient for the compiler to
"normalize" the value (convert it to, e.g., 1 or 0) than for the
comparison operators to do so because there may be opportunities to
combine the normalization with other operations.
0x80000001
if instructions
exist that set both the sign and low-order bits but do not define the
others.
0x80000000
.
Many machines can produce both the value chosen for
STORE_FLAG_VALUE
and its negation in the same number of
instructions. On those machines, you should also define a pattern for
those cases, e.g., one matching
(set A (neg:m (ne:m B C)))
Some machines can also perform and
or plus
operations on
condition code values with less instructions than the corresponding
s
cond insn followed by
and
or plus
. On those
machines, define the appropriate patterns. Use the names incscc
and decscc
, respectively, for the patterns which perform
plus
or minus
operations on condition code values. See
rs6000.md
for some examples. The GNU Superoptizer can be used to
find such instruction sequences on other machines.
You need not define STORE_FLAG_VALUE
if the machine has no store-flag
instructions.
FLOAT_STORE_FLAG_VALUE (
mode)
REAL_VALUE_TYPE
value that is
returned when comparison operators with floating-point results are true.
Define this macro on machine that have comparison operations that return
floating-point values. If there are no such operations, do not define
this macro.
Pmode
SImode
on 32-bit machine or DImode
on 64-bit machines.
On some machines you must define this to be one of the partial integer
modes, such as PSImode
.
The width of Pmode
must be at least as large as the value of
POINTER_SIZE
. If it is not equal, you must define the macro
POINTERS_EXTEND_UNSIGNED
to specify how pointers are extended
to Pmode
.
FUNCTION_MODE
call
RTL expressions. On most machines this
should be QImode
.
INTEGRATE_THRESHOLD (
decl)
FUNCTION_DECL
node.
The default definition of this macro is 64 plus 8 times the number of
arguments that the function accepts. Some people think a larger
threshold should be used on RISC machines.
STDC_0_IN_SYSTEM_HEADERS
__STDC__
to the
constant 1, to signify that GCC conforms to ISO Standard C. On some
hosts, like Solaris, the system compiler uses a different convention,
where __STDC__
is normally 0, but is 1 if the user specifies
strict conformance to the C Standard.
Defining STDC_0_IN_SYSTEM_HEADERS
makes GNU CPP follows the host
convention when processing system header files, but when processing user
files __STDC__
will always expand to 1.
NO_IMPLICIT_EXTERN_C
extern "C" {...}
.
HANDLE_PRAGMA (
getc,
ungetc,
name)
REGISTER_TARGET_PRAGMAS
instead.
REGISTER_TARGET_PRAGMAS ()
c_register_pragma
for each pragma. The macro may also do any
setup required for the pragmas.
The primary reason to define this macro is to provide compatibility with other compilers for the same target. In general, we discourage definition of target-specific pragmas for GCC.
If the pragma can be implemented by attributes then you should consider
defining the target hook TARGET_INSERT_ATTRIBUTES
as well.
Preprocessor macros that appear on pragma lines are not expanded. All
#pragma
directives that do not match any registered pragma are
silently ignored, unless the user specifies -Wunknown-pragmas
.
void c_register_pragma (const char *space, const char *name, void (*callback) (struct cpp_reader *)) | Function |
Each call to #pragma [space] name ... space is the case-sensitive namespace of the pragma, or
For an example use of this routine, see Note that the use of |
HANDLE_SYSV_PRAGMA
#pragma pack(<n>)
and #pragma weak <name>
[=<value>]
to be supported by gcc.
The pack pragma specifies the maximum alignment (in bytes) of fields
within a structure, in much the same way as the __aligned__
and
__packed__
__attribute__
s do. A pack value of zero resets
the behavior to the default.
A subtlety for Microsoft Visual C/C++ style bit-field packing (e.g. -mms-bitfields) for targets that support it: When a bit-field is inserted into a packed record, the whole size of the underlying type is used by one or more same-size adjacent bit-fields (that is, if its long:3, 32 bits is used in the record, and any additional adjacent long bit-fields are packed into the same chunk of 32 bits. However, if the size changes, a new field of that size is allocated).
If both MS bit-fields and __attribute__((packed))
are used,
the latter will take precedence. If __attribute__((packed))
is
used on a single field when MS bit-fields are in use, it will take
precedence for that field, but the alignment of the rest of the structure
may affect its placement.
The weak pragma only works if SUPPORTS_WEAK
and
ASM_WEAKEN_LABEL
are defined. If enabled it allows the creation
of specifically named weak labels, optionally with a value.
HANDLE_PRAGMA_PACK_PUSH_POP
#pragma pack(push,
n)
and #pragma
pack(pop)
. The pack(push,
n)
pragma specifies the maximum alignment
(in bytes) of fields within a structure, in much the same way as the
__aligned__
and __packed__
__attribute__
s do. A
pack value of zero resets the behavior to the default. Successive
invocations of this pragma cause the previous values to be stacked, so
that invocations of #pragma pack(pop)
will return to the previous
value.
DOLLARS_IN_IDENTIFIERS
$
in identifier
names. 0 means $
is not allowed by default; 1 means it is allowed.
1 is the default; there is no need to define this macro in that case.
This macro controls the compiler proper; it does not affect the preprocessor.
NO_DOLLAR_IN_LABEL
$
in label names. By default constructors and destructors in
G++ have $
in the identifiers. If this macro is defined,
.
is used instead.
NO_DOT_IN_LABEL
.
in label names. By default constructors and destructors in G++
have names that use .
. If this macro is defined, these names
are rewritten to avoid .
.
DEFAULT_MAIN_RETURN
main
function to return a standard "success" value by default (if no other
value is explicitly returned).
The definition should be a C statement (sans semicolon) to generate the
appropriate rtl instructions. It is used only when compiling the end of
main
.
NEED_ATEXIT
atexit
from the ISO C standard. If this macro is defined, a default definition
will be provided to support C++. If ON_EXIT
is not defined,
a default exit
function will also be provided.
ON_EXIT
exit
. For instance, SunOS 4 has
a similar on_exit
library function.
The definition should be a functional macro which can be used just like
the atexit
function.
EXIT_BODY
exit
function needs to do something
besides calling an external function _cleanup
before
terminating with _exit
. The EXIT_BODY
macro is
only needed if NEED_ATEXIT
is defined and ON_EXIT
is not
defined.
INSN_SETS_ARE_DELAYED (
insn)
jump_insn
or an insn
; GCC knows that
every call_insn
has this behavior. On machines where some insn
or jump_insn
is really a function call and hence has this behavior,
you should define this macro.
You need not define this macro if it would always return zero.
INSN_REFERENCES_ARE_DELAYED (
insn)
jump_insn
or an insn
. On machines where
some insn
or jump_insn
is really a function call and its operands
are registers whose use is actually in the subroutine it calls, you should
define this macro. Doing so allows the delay slot scheduler to move
instructions which copy arguments into the argument registers into the delay
slot of insn.
You need not define this macro if it would always return zero.
MACHINE_DEPENDENT_REORG (
insn)
MULTIPLE_SYMBOL_SPACES
MD_ASM_CLOBBERS (
clobbers)
STRING_CST
trees for
any hard regs the port wishes to automatically clobber for all asms.
MAX_INTEGER_COMPUTATION_MODE
You need only define this macro if the target holds values larger than
word_mode
in general purpose registers. Most targets should not define
this macro.
MATH_LIBRARY
""
if the target does not have a
separate math library.
You need only define this macro if the default of "-lm"
is wrong.
LIBRARY_PATH_ENV
You need only define this macro if the default of "LIBRARY_PATH"
is wrong.
TARGET_HAS_F_SETLKW
TARGET_HAS_F_SETLKW
will enable the test coverage code
to use file locking when exiting a program, which avoids race conditions
if the program has forked.
MAX_CONDITIONAL_EXECUTE
BRANCH_COST
+1 is the default if the machine does not use cc0, and
1 if it does use cc0.
IFCVT_MODIFY_TESTS(
ce_info,
true_expr,
false_expr)
struct ce_if_block
, which
contains information about the currently processed blocks. true_expr
and false_expr are the tests that are used for converting the
then-block and the else-block, respectively. Set either true_expr or
false_expr to a null pointer if the tests cannot be converted.
IFCVT_MODIFY_MULTIPLE_TESTS(
ce_info,
bb,
true_expr,
false_expr)
IFCVT_MODIFY_TESTS
, but used when converting more complicated
if-statements into conditions combined by and
and or
operations.
bb contains the basic block that contains the test that is currently
being processed and about to be turned into a condition.
IFCVT_MODIFY_INSN(
ce_info,
pattern,
insn)
struct ce_if_block
, which contains information
about the currently processed blocks.
IFCVT_MODIFY_FINAL(
ce_info)
struct ce_if_block
structure that is pointed
to by ce_info.
IFCVT_MODIFY_CANCEL(
ce_info)
struct ce_if_block
structure that is pointed
to by ce_info.
IFCVT_INIT_EXTRA_FIELDS(
ce_info)
struct ce_if_block
structure, which are defined by the IFCVT_EXTRA_FIELDS
macro.
IFCVT_EXTRA_FIELDS
struct ce_if_block
structure. These should be initialized
by the IFCVT_INIT_EXTRA_FIELDS
macro.
void TARGET_INIT_BUILTINS () | Target Hook |
Define this hook if you have any machine-specific built-in functions
that need to be defined. It should be a function that performs the
necessary setup.
Machine specific built-in functions can be useful to expand special machine instructions that would otherwise not normally be generated because they have no equivalent in the source language (for example, SIMD vector instructions or prefetch instructions). To create a built-in function, call the function |
rtx TARGET_EXPAND_BUILTIN (tree exp, rtx target, rtx subtarget, enum machine_mode mode, int ignore) | Target Hook |
Expand a call to a machine specific built-in function that was set up by
|
MD_CAN_REDIRECT_BRANCH(
branch1,
branch2)
On some targets, branches may have a limited range. Optimizing the
filling of delay slots can result in branches being redirected, and this
may in turn cause a branch offset to overflow.
ALLOCATE_INITIAL_VALUE(
hard_reg)
ALLOCATE_INITIAL_VALUE
, if
defined, is called at the start of register allocation once for each
hard register that had its initial value copied by using
get_func_hard_reg_initial_val
or get_hard_reg_initial_val
.
Possible values are NULL_RTX
, if you don't want
to do any special allocation, a REG
rtx--that would typically be
the hard register itself, if it is known not to be clobbered--or a
MEM
.
If you are returning a MEM
, this is only a hint for the allocator;
it might decide to use another register anyways.
You may use current_function_leaf_function
in the definition of the
macro, functions that use REG_N_SETS
, to determine if the hard
register in question will not be clobbered.
TARGET_OBJECT_SUFFIX
.o
as the suffix for object files.
TARGET_EXECUTABLE_SUFFIX
COLLECT_EXPORT_LIST
collect2
will scan the individual object files
specified on its command line and create an export list for the linker.
Define this macro for systems like AIX, where the linker discards
object files that are not referenced from main
and uses export
lists.
bool TARGET_CANNOT_MODIFY_JUMPS_P (void) | Target Hook |
This target hook returns true past the point in which new jump
instructions could be created. On machines that require a register for
every jump such as the SHmedia ISA of SH5, this point would typically be
reload, so this target hook should be defined to a function such as:
static bool cannot_modify_jumps_past_reload_p () { return (reload_completed || reload_in_progress); } |