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Defines |
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#define | AD9854_REFCLK_FREQ 50000000l |
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#define | AD9854_IO_UPDATE P04 |
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#define | AD9854_RESET P05 |
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#define | AD9854_REG_BASE 0x81000400 |
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#define | AD9854_REG_PHASE1H 0x00 |
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#define | AD9854_REG_PHASE1L 0x01 |
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#define | AD9854_REG_PHASE2H 0x02 |
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#define | AD9854_REG_PHASE2L 0x03 |
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#define | AD9854_REG_FREQ15 0x04 |
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#define | AD9854_REG_FREQ14 0x05 |
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#define | AD9854_REG_FREQ13 0x06 |
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#define | AD9854_REG_FREQ12 0x07 |
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#define | AD9854_REG_FREQ11 0x08 |
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#define | AD9854_REG_FREQ10 0x09 |
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#define | AD9854_REG_FREQ25 0x0A |
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#define | AD9854_REG_FREQ24 0x0B |
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#define | AD9854_REG_FREQ23 0x0C |
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#define | AD9854_REG_FREQ22 0x0D |
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#define | AD9854_REG_FREQ21 0x0E |
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#define | AD9854_REG_FREQ20 0x0F |
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#define | AD9854_REG_DELTA5 0x10 |
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#define | AD9854_REG_DELTA4 0x11 |
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#define | AD9854_REG_DELTA3 0x12 |
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#define | AD9854_REG_DELTA2 0x13 |
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#define | AD9854_REG_DELTA1 0x14 |
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#define | AD9854_REG_DELTA0 0x15 |
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#define | AD9854_REG_UPDCLOCK3 0x16 |
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#define | AD9854_REG_UPDCLOCK2 0x17 |
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#define | AD9854_REG_UPDCLOCK1 0x18 |
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#define | AD9854_REG_UPDCLOCK0 0x19 |
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#define | AD9854_REG_RAMPCLOCK2 0x1A |
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#define | AD9854_REG_RAMPCLOCK1 0x1B |
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#define | AD9854_REG_RAMPCLOCK0 0x1C |
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#define | AD9854_REG_CTRL3 0x1D |
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#define | AD9854_REG_CTRL2 0x1E |
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#define | AD9854_REG_CTRL1 0x1F |
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#define | AD9854_REG_CTRL0 0x20 |
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#define | AD9854_REG_AMPLIH 0x21 |
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#define | AD9854_REG_AMPLIL 0x22 |
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#define | AD9854_REG_AMPLQH 0x23 |
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#define | AD9854_REG_AMPLQL 0x24 |
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#define | AD9854_REG_OSKEYRAMP 0x25 |
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#define | AD9854_REG_QDACH 0x26 |
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#define | AD9854_REG_QDACL 0x27 |
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#define | AD9854_MODE_SINGLE 0x00 |
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#define | AD9854_MODE_FSK 0x01 |
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#define | AD9854_MODE_RAMPFSK 0x02 |
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#define | AD9854_MODE_CHIRP 0x03 |
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#define | AD9854_MODE_BPSK 0x04 |
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#define | AD9854_INVSINC_BYPASS BIT(6) |
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#define | AD9854_INT_IO_UPDATE BIT(8) |
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#define | AD9854_MODE_MASK 0x00000E00 |
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#define | AD9854_MODE0 BIT(9) |
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#define | AD9854_MODE1 BIT(10) |
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#define | AD9854_MODE2 BIT(11) |
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#define | AD9854_TRIANGLE BIT(13) |
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#define | AD9854_CLR_ACC2 BIT(14) |
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#define | AD9854_CLR_ACC1 BIT(15) |
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#define | AD9854_PLL_MULT_MASK 0x001F0000 |
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#define | AD9854_PLL_MULT0 BIT(16) |
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#define | AD9854_PLL_MULT1 BIT(17) |
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#define | AD9854_PLL_MULT2 BIT(18) |
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#define | AD9854_PLL_MULT3 BIT(19) |
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#define | AD9854_PLL_MULT4 BIT(20) |
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#define | AD9854_PLL_BYPASS BIT(21) |
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#define | AD9854_PLL_RANGE BIT(22) |
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#define | AD9854_PD_DIG BIT(24) |
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#define | AD9854_PD_DAC BIT(25) |
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#define | AD9854_PD_QDAC BIT(26) |
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#define | AD9854_PD_COMP BIT(28) |
Functions |
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void | ad9854Init (void) |
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void | ad9854SetupIOUpdate (int state) |
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void | ad9854ClockIOUpdate (void) |
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void | ad9854WritePhase1 (u16 phase) |
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void | ad9854WritePhase2 (u16 phase) |
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void | ad9854WriteFreq1 (u64 freq) |
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void | ad9854WriteFreq2 (u64 freq) |
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void | ad9854WriteDeltaFreq (u64 freq) |
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void | ad9854WriteUpdateClock (u32 updclock) |
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void | ad9854WriteRampRateClock (u32 rampclock) |
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void | ad9854WriteControlReg (u32 cr) |
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void | ad9854WriteAmplitudeI (u16 ampi) |
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void | ad9854WriteAmplitudeQ (u16 ampq) |
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void | ad9854WriteOSKeyRampRate (u16 ramprate) |
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void | ad9854WriteQDAC (u16 qdac) |
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u32 | ad9854ReadControlReg (void) |
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void | ad9854ControlClear (u32 cr_clear) |
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void | ad9854ControlSet (u32 cr_set) |
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void | ad9854SetMode (int mode) |
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void | ad9854SetPLL (int enabled, int mult) |
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void | ad9854SetFreq1 (u32 freqHz) |
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void | ad9854SetUpdateClock (u32 updclockHz) |
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void | ad9854ShowRegisters (void) |
