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Defines |
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#define | nop() asm volatile ("nop") |
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#define | CR 0x00 |
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#define | PSTART 0x01 |
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#define | PSTOP 0x02 |
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#define | BNRY 0x03 |
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#define | RDMAPORT 0x10 |
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#define | MEMR 0x14 |
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#define | TR 0x15 |
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#define | SPP_DPR 0x18 |
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#define | SSP_SPR 0x19 |
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#define | SSP_CPR 0x1A |
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#define | TSR 0x04 |
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#define | NCR 0x05 |
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#define | ISR 0x07 |
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#define | CRDA0 0x08 |
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#define | CRDA1 0x09 |
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#define | RSR 0x0C |
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#define | CNTR0 0x0D |
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#define | CNTR1 0x0E |
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#define | CNTR2 0x0F |
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#define | GPI 0x17 |
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#define | RSTPORT 0x1F |
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#define | TPSR 0x04 |
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#define | TBCR0 0x05 |
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#define | TBCR1 0x06 |
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#define | RSAR0 0x08 |
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#define | RSAR1 0x09 |
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#define | RBCR0 0x0A |
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#define | RBCR1 0x0B |
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#define | RCR 0x0C |
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#define | TCR 0x0D |
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#define | DCR 0x0E |
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#define | IMR 0x0F |
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#define | GPOC 0x17 |
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#define | PAR0 0x01 |
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#define | PAR1 0x02 |
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#define | PAR2 0x03 |
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#define | PAR3 0x04 |
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#define | PAR4 0x05 |
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#define | PAR5 0x06 |
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#define | CURR 0x07 |
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#define | CPR 0x07 |
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#define | PS1 0x80 |
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#define | PS0 0x40 |
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#define | RD2 0x20 |
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#define | RD1 0x10 |
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#define | RD0 0x08 |
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#define | TXP 0x04 |
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#define | START 0x02 |
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#define | STOP 0x01 |
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#define | INTT 0x40 |
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#define | MON 0x20 |
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#define | PRO 0x10 |
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#define | AM 0x08 |
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#define | AB 0x04 |
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#define | AR 0x02 |
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#define | SEP 0x01 |
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#define | RST 0x80 |
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#define | RDC 0x40 |
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#define | OVW 0x10 |
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#define | RXE 0x08 |
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#define | TXE 0x04 |
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#define | PTX 0x02 |
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#define | PRX 0x01 |
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#define | AUTOD 0x01 |
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#define | RST_B 0x02 |
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#define | RST_10B 0x04 |
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#define | RST_TXB 0x08 |
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#define | GPO0 0x01 |
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#define | MPSEL 0x10 |
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#define | MPSET 0x20 |
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#define | PPDSET 0x40 |
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#define | MDC 0x01 |
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#define | MDIR 0x02 |
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#define | MDI 0x04 |
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#define | MDO 0x08 |
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#define | EECS 0x10 |
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#define | EEI 0x20 |
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#define | EEO 0x40 |
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#define | EECLK 0x80 |
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#define | GPI2 0x40 |
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#define | GPI1 0x20 |
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#define | GPI0 0x10 |
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#define | I_SPD 0x04 |
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#define | I_DPX 0x02 |
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#define | I_LINK 0x01 |
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#define | FDU 0x80 |
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#define | PD 0x40 |
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#define | RLO 0x20 |
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#define | LB1 0x04 |
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#define | LB0 0x02 |
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#define | CRC 0x01 |
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#define | RCR_INIT (INTT | AB) |
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#define | DCR_INIT 0x00 |
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#define | TCR_INIT 0x00 |
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#define | IMR_INIT 0x11 |
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#define | TXSTART_INIT 0x40 |
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#define | RXSTART_INIT 0x46 |
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#define | RXSTOP_INIT 0x60 |
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#define | ETHERNET_MIN_PACKET_LENGTH 0x3C |
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#define | PKTHEADER_STATUS 0x00 |
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#define | PKTHEADER_NEXTPAGE 0x01 |
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#define | PKTHEADER_PKTLENL 0x02 |
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#define | PKTHEADER_PKTLENH 0x03 |
Functions |
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void | ax88796SetupPorts (void) |
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u08 | ax88796Read (u08 address) |
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void | ax88796Write (u08 address, u08 data) |
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void | ax88796Init (void) |
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void | ax88796BeginPacketSend (unsigned int packetLength) |
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void | ax88796SendPacketData (unsigned char *localBuffer, unsigned int length) |
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void | ax88796EndPacketSend (void) |
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unsigned int | ax88796BeginPacketRetreive (void) |
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void | ax88796RetreivePacketData (unsigned char *localBuffer, unsigned int length) |
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void | ax88796EndPacketRetreive (void) |
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void | ax88796ProcessInterrupt (void) |
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void | ax88796ReceiveOverflowRecover (void) |
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void | ax88796WriteMii (unsigned char phyad, unsigned char regad, unsigned int mii_data) |
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unsigned int | ax88796ReadMii (unsigned char phyad, unsigned char regad) |
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void | ax88796RegDump (void) |
