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00023 #ifndef CS8900_H
00024 #define CS8900_H
00025
00026 #include "global.h"
00027
00028 #define nop() asm volatile ("nop")
00029
00030
00031
00032 #define CS8900_ESIA_ID (0x630e)
00033
00034
00035 #define CS8900_IO_RXTX_DATA_PORT0 (0x0000)
00036 #define CS8900_IO_RXTX_DATA_PORT1 (0x0002)
00037 #define CS8900_IO_TXCMD (0x0004)
00038 #define CS8900_IO_TXLENGTH (0x0006)
00039 #define CS8900_IO_ISQ (0x0008)
00040 #define CS8900_IO_PP_PTR (0x000a)
00041 #define CS8900_IO_PP_DATA_PORT0 (0x000c)
00042 #define CS8900_IO_PP_DATA_PORT1 (0x000e)
00043
00044
00045
00046
00047 #define PP_ChipID 0x0000 // offset 0h -> Corp-ID
00048
00049
00050
00051 #define PP_ISAIOB 0x0020 // IO base address
00052 #define PP_CS8900_ISAINT 0x0022 // ISA interrupt select
00053 #define PP_CS8900_ISADMA 0x0024 // ISA Rec DMA channel
00054 #define PP_ISASOF 0x0026 // ISA DMA offset
00055 #define PP_DmaFrameCnt 0x0028 // ISA DMA Frame count
00056 #define PP_DmaByteCnt 0x002A // ISA DMA Byte count
00057 #define PP_CS8900_ISAMemB 0x002C // Memory base
00058 #define PP_ISABootBase 0x0030 // Boot Prom base
00059 #define PP_ISABootMask 0x0034 // Boot Prom Mask
00060 #define PP_RxFrameByteCnt 0x0050
00061
00062
00063 #define PP_EECMD 0x0040 // NVR Interface Command register
00064 #define PP_EEData 0x0042 // NVR Interface Data Register
00065
00066
00067 #define PP_RxCFG 0x0102 // Rx Bus config
00068 #define PP_RxCTL 0x0104 // Receive Control Register
00069 #define PP_TxCFG 0x0106 // Transmit Config Register
00070 #define PP_TxCMD 0x0108 // Transmit Command Register
00071 #define PP_BufCFG 0x010A // Bus configuration Register
00072 #define PP_LineCTL 0x0112 // Line Config Register
00073 #define PP_SelfCTL 0x0114 // Self Command Register
00074 #define PP_BusCTL 0x0116 // ISA bus control Register
00075 #define PP_TestCTL 0x0118 // Test Register
00076
00077
00078 #define PP_ISQ 0x0120 // Interrupt Status
00079 #define PP_RxEvent 0x0124 // Rx Event Register
00080 #define PP_TxEvent 0x0128 // Tx Event Register
00081 #define PP_BufEvent 0x012C // Bus Event Register
00082 #define PP_RxMiss 0x0130 // Receive Miss Count
00083 #define PP_TxCol 0x0132 // Transmit Collision Count
00084 #define PP_LineST 0x0134 // Line State Register
00085 #define PP_SelfST 0x0136 // Self State register
00086 #define PP_BusST 0x0138 // Bus Status
00087 #define PP_TDR 0x013C // Time Domain Reflectometry
00088
00089
00090 #define PP_TxCommand 0x0144 // Tx Command
00091 #define PP_TxLength 0x0146 // Tx Length
00092
00093
00094 #define PP_LAF 0x0150 // Hash Table
00095 #define PP_IA 0x0158 // Physical Address Register
00096
00097
00098 #define PP_RxStatus 0x0400 // Receive start of frame
00099 #define PP_RxLength 0x0402 // Receive Length of frame
00100 #define PP_RxFrame 0x0404 // Receive frame pointer
00101 #define PP_TxFrame 0x0A00 // Transmit frame pointer
00102
00103
00104
00105 #define DEFAULTIOBASE 0x0300
00106
00107
00108 #define SKIP_1 0x0040
00109 #define RX_STREAM_ENBL 0x0080
00110 #define RX_OK_ENBL 0x0100
00111 #define RX_DMA_ONLY 0x0200
00112 #define AUTO_RX_DMA 0x0400
00113 #define BUFFER_CRC 0x0800
00114 #define RX_CRC_ERROR_ENBL 0x1000
00115 #define RX_RUNT_ENBL 0x2000
00116 #define RX_EXTRA_DATA_ENBL 0x4000
00117
00118
00119 #define RX_IA_HASH_ACCEPT 0x0040
00120 #define RX_PROM_ACCEPT 0x0080
00121 #define RX_OK_ACCEPT 0x0100
00122 #define RX_MULTCAST_ACCEPT 0x0200
00123 #define RX_IA_ACCEPT 0x0400
00124 #define RX_BROADCAST_ACCEPT 0x0800
00125 #define RX_BAD_CRC_ACCEPT 0x1000
00126 #define RX_RUNT_ACCEPT 0x2000
00127 #define RX_EXTRA_DATA_ACCEPT 0x4000
00128
00129
00130 #define TX_LOST_CRS_ENBL 0x0040
00131 #define TX_SQE_ERROR_ENBL 0x0080
00132 #define TX_OK_ENBL 0x0100
00133 #define TX_LATE_COL_ENBL 0x0200
00134 #define TX_JBR_ENBL 0x0400
00135 #define TX_ANY_COL_ENBL 0x0800
00136 #define TX_16_COL_ENBL 0x8000
00137
00138
00139
00140 #define TX_START_5_BYTES 0x0000
00141 #define TX_START_381_BYTES 0x0040
00142 #define TX_START_1021_BYTES 0x0080
00143 #define TX_START_ALL_BYTES 0x00C0
00144 #define TX_FORCE 0x0100
00145 #define TX_ONE_COL 0x0200
00146 #define TX_NO_CRC 0x1000
00147 #define TX_RUNT 0x2000
00148
00149
00150 #define GENERATE_SW_INTERRUPT 0x0040
00151 #define RX_DMA_ENBL 0x0080
00152 #define READY_FOR_TX_ENBL 0x0100
00153 #define TX_UNDERRUN_ENBL 0x0200
00154 #define RX_MISS_ENBL 0x0400
00155 #define RX_128_BYTE_ENBL 0x0800
00156 #define TX_COL_COUNT_OVRFLOW_ENBL 0x1000
00157 #define RX_MISS_COUNT_OVRFLOW_ENBL 0x2000
00158 #define RX_DEST_MATCH_ENBL 0x8000
00159
00160
00161 #define SERIAL_RX_ON 0x0040
00162 #define SERIAL_TX_ON 0x0080
00163 #define AUI_ONLY 0x0100
00164 #define AUTO_AUI_10BASET 0x0200
00165 #define MODIFIED_BACKOFF 0x0800
00166 #define NO_AUTO_POLARITY 0x1000
00167 #define TWO_PART_DEFDIS 0x2000
00168 #define LOW_RX_SQUELCH 0x4000
00169
00170
00171 #define POWER_ON_RESET 0x0040
00172 #define SW_STOP 0x0100
00173 #define SLEEP_ON 0x0200
00174 #define AUTO_WAKEUP 0x0400
00175 #define HCB0_ENBL 0x1000
00176 #define HCB1_ENBL 0x2000
00177 #define HCB0 0x4000
00178 #define HCB1 0x8000
00179
00180
00181 #define RESET_RX_DMA 0x0040
00182 #define MEMORY_ON 0x0400
00183 #define DMA_BURST_MODE 0x0800
00184 #define IO_CHANNEL_READY_ON 0x1000
00185 #define RX_DMA_SIZE_64K 0x2000
00186 #define ENABLE_IRQ 0x8000
00187
00188
00189 #define LINK_OFF 0x0080
00190 #define ENDEC_LOOPBACK 0x0200
00191 #define AUI_LOOPBACK 0x0400
00192 #define BACKOFF_OFF 0x0800
00193 #define FDX_8900 0x4000
00194
00195
00196 #define RX_IA_HASHED 0x0040
00197 #define RX_DRIBBLE 0x0080
00198 #define RX_OK 0x0100
00199 #define RX_HASHED 0x0200
00200 #define RX_IA 0x0400
00201 #define RX_BROADCAST 0x0800
00202 #define RX_CRC_ERROR 0x1000
00203 #define RX_RUNT 0x2000
00204 #define RX_EXTRA_DATA 0x4000
00205 #define HASH_INDEX_MASK 0xFC00 // Hash-Table Index Mask (6 Bit)
00206
00207
00208 #define TX_LOST_CRS 0x0040
00209 #define TX_SQE_ERROR 0x0080
00210 #define TX_OK 0x0100
00211 #define TX_LATE_COL 0x0200
00212 #define TX_JBR 0x0400
00213 #define TX_16_COL 0x8000
00214 #define TX_COL_COUNT_MASK 0x7800
00215
00216
00217 #define SW_INTERRUPT 0x0040
00218 #define RX_DMA 0x0080
00219 #define READY_FOR_TX 0x0100
00220 #define TX_UNDERRUN 0x0200
00221 #define RX_MISS 0x0400
00222 #define RX_128_BYTE 0x0800
00223 #define TX_COL_OVRFLW 0x1000
00224 #define RX_MISS_OVRFLW 0x2000
00225 #define RX_DEST_MATCH 0x8000
00226
00227
00228 #define LINK_OK 0x0080
00229 #define AUI_ON 0x0100
00230 #define TENBASET_ON 0x0200
00231 #define POLARITY_OK 0x1000
00232 #define CRS_OK 0x4000
00233
00234
00235 #define ACTIVE_33V 0x0040
00236 #define INIT_DONE 0x0080
00237 #define SI_BUSY 0x0100
00238 #define EEPROM_PRESENT 0x0200
00239 #define EEPROM_OK 0x0400
00240 #define EL_PRESENT 0x0800
00241 #define EE_SIZE_64 0x1000
00242
00243
00244 #define TX_BID_ERROR 0x0080
00245 #define READY_FOR_TX_NOW 0x0100
00246
00247
00248 #define ISQ_RX_EVENT 0x0004
00249 #define ISQ_TX_EVENT 0x0008
00250 #define ISQ_BUFFER_EVENT 0x000C
00251 #define ISQ_RX_MISS_EVENT 0x0010
00252 #define ISQ_TX_COL_EVENT 0x0012
00253
00254 #define ISQ_EVENT_MASK 0x003F // ISQ mask to find out type of event
00255
00256 #define AUTOINCREMENT 0x8000 // Bit mask to set Bit-15 for autoincrement
00257
00258
00259 #define EEPROM_WRITE_EN 0x00F0
00260 #define EEPROM_WRITE_DIS 0x0000
00261 #define EEPROM_WRITE_CMD 0x0100
00262 #define EEPROM_READ_CMD 0x0200
00263
00264
00265 #define RBUF_EVENT_LOW 0x0000 // Low byte of RxEvent
00266 #define RBUF_EVENT_HIGH 0x0001 // High byte of RxEvent
00267 #define RBUF_LEN_LOW 0x0002 // Length of received data - low byte
00268 #define RBUF_LEN_HI 0x0003 // Length of received data - high byte
00269 #define RBUF_HEAD_LEN 0x0004 // Length of this header
00270
00271
00272
00273
00274
00275
00276
00277 #include "nic.h"
00278
00279 unsigned int cs8900BeginPacketRetreive(void);
00280 void cs8900RetreivePacketData(u08* packet, unsigned int packetLength);
00281 void cs8900EndPacketRetreive(void);
00282
00283
00284 void cs8900Init(void);
00285 void cs8900Write(unsigned char address, unsigned char data);
00286 unsigned char cs8900Read(unsigned char address);
00287
00288 void cs8900Write16(unsigned char address, unsigned short data);
00289 unsigned short cs8900Read16(unsigned char address);
00290
00291 void cs8900WriteReg(unsigned short address, unsigned short data);
00292 unsigned short cs8900ReadReg(unsigned short address);
00293
00294 void cs8900CopyToFrame(unsigned char *source, unsigned short size);
00295 void cs8900CopyFromFrame(unsigned char *dest, unsigned short size);
00296
00297 u08 cs8900LinkStatus(void);
00298
00299 void cs8900IORegDump(void);
00300 void cs8900RegDump(void);
00301
00302 #endif
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